Question

xc6slx45型号的FPGA芯片上时钟信号专用引脚是哪些，进行管脚约束时总是说没有分配在正确位置

Place:1109 - A clock IOB / BUFGMUX clock component pair have been found that are not placed at an optimal clock IOB / BUFGMUX site pair. The clock IOB component <clk> is placed at site <N1>. The corresponding BUFG component <clk_BUFGP/BUFG> is placed at site <BUFGMUX_X2Y3>. There is only a select set of IOBs that can use the fast path to the Clocker buffer, and they are not being used. You may want to analyze why this problem exists and correct it. This is normally an ERROR but the CLOCK_DEDICATED_ROUTE constraint was applied on COMP.PIN <clk.PAD> allowing your design to continue. This constraint disables all clock placer rules related to the specified COMP.PIN. The use of this override is highly discouraged as it may lead to very poor timing results. It is recommended that this error condition be corrected in the design.

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Answer 1

可以下载一下xc6slx45手册看一下，这个在datasheet上都有说明的