Question

XILINX软件仿真全部通过，只有如下一个警告，硬件仿真却不按软件仿真的方式跑，什么原因？

One or more signals are missing in the sensitivity list of always block. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
<num1>

Answer 1

ise把你的信号综合掉了，你找到这个信号名字，把他设成不可综合，具体怎么设自己百度。

这个是基础问题吧，一般的书上都有。