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74LS148和74LS348都是8-3优先权编码器,74LS148的VHDL描述如下:
ENTITY prioty_encoder IS
PORT(ei_n:IN Bit;
d:IN Bit_Vector(7 DOWNTO 0);
eo_n,gs_n:OUT Bit;
a:OUT Bit _Vector(2 DOWNTO 0));
END prioty_encoder;
ARCHITECTURE encoder OFprioty_encoder IS
BEGIN
PROCESS(ei_n,d)
BEGIN
IF(ei_n = ′1′)THEN
eo_n <= ′1′;
gs_n <= ′1′;
a <= ″111″; -- 不允许当前编码器编码
ELSIF(d= B″1111_1111″)THEN
eo_n <= ′0′;
gs_n <= ′1′;
a <= ″111″; -- 当前编码器无码可编
ELSE
eo_n <= ′1′;
gs_n <= ′0′;
IF(d(7)= ′0′)THEN
a <= ″000″;
ELSIF(d(6)= ′0′)THEN
a <= ″001″;
ELSIF(d(5)= ′0′)THEN
a <= ″010″;
ELSIF(d(4)= ′0′)THEN
a <= ″011″;
ELSIF(d(3)= ′0′)THEN
a <= ″100″;
ELSIF(d(2)= ′0′)THEN
a <= ″101″;
ELSIF(d(1)= ′0′)THEN
a <= ″110″;
ELSE
a <= ″111″;
END IF;
END IF;
END PROCESS;
END encoder;
上述描述中,有不少全角字符,需要改成半角字符之后,才能通过编译。
ENTITY prioty_encoder IS
PORT(ei_n:IN Bit;
d:IN Bit_Vector(7 DOWNTO 0);
eo_n,gs_n:OUT Bit;
a:OUT Bit _Vector(2 DOWNTO 0));
END prioty_encoder;
ARCHITECTURE encoder OFprioty_encoder IS
BEGIN
PROCESS(ei_n,d)
BEGIN
IF(ei_n = ′1′)THEN
eo_n <= ′1′;
gs_n <= ′1′;
a <= ″111″; -- 不允许当前编码器编码
ELSIF(d= B″1111_1111″)THEN
eo_n <= ′0′;
gs_n <= ′1′;
a <= ″111″; -- 当前编码器无码可编
ELSE
eo_n <= ′1′;
gs_n <= ′0′;
IF(d(7)= ′0′)THEN
a <= ″000″;
ELSIF(d(6)= ′0′)THEN
a <= ″001″;
ELSIF(d(5)= ′0′)THEN
a <= ″010″;
ELSIF(d(4)= ′0′)THEN
a <= ″011″;
ELSIF(d(3)= ′0′)THEN
a <= ″100″;
ELSIF(d(2)= ′0′)THEN
a <= ″101″;
ELSIF(d(1)= ′0′)THEN
a <= ″110″;
ELSE
a <= ″111″;
END IF;
END IF;
END PROCESS;
END encoder;
上述描述中,有不少全角字符,需要改成半角字符之后,才能通过编译。
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