Question

VHDL 程序设计： 输入两个5位二进制数，要求在7段4位数码管上以十进制显示

两个5位二进制数，一个为起始数，一个为终止数，在7段4位数码管上以十进制从起始数到终止数进行计数！（不过我觉得在7段4位数码管上前两位用不到，因为相当于最多也是从0到31计数）

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Answer 1

你要的程序应该是下面这样，分频没有做进去，逆的也没有做进去。
此程序已经经过Quartus13.0sp1翻译过了。

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity Zaehler is port(
clk : in std_logic;
a,b : in std_logic_vector (4 downto 0);
s0 : out std_logic_vector(6 downto 0);
s1 : out std_logic_vector(6 downto 0);
s2 : out std_logic_vector(6 downto 0);
s3 : out std_logic_vector(6 downto 0)
);
end Zaehler;

architecture logik of Zaehler is

--函数开始：将二进制数进行转化

function int_bin ( bin : std_logic_vector(4 downto 0) ) return std_logic_vector is
variable i : integer:=0;
variable bcd : std_logic_vector(7 downto 0) := (others => '0');
variable bint : std_logic_vector(4 downto 0) := bin;
begin
for i in 0 to 4 loop
bcd(7 downto 1) := bcd(6 downto 0);
bcd(0) := bint(4);
bint(4 downto 1) := bint(3 downto 0);
bint(0) :='0';

if(i < 4 and bcd(3 downto 0) > "0100") then
bcd(3 downto 0) := bcd(3 downto 0) + "0011";
end if;

if(i < 4 and bcd(7 downto 4) > "0100") then
bcd(7 downto 4) := bcd(7 downto 4) + "0011";
end if;

end loop;
return bcd;
end int_bin;
--函数结束

--结构开始

signal p: std_logic_vector(4 downto 0):= b;

begin

Clock: process(clk, a, b, p)
begin
if (clk'event and clk ='1') then
if (p <= a) then p <= p+"00001";
else p <= b;
end if;
end if;
end process Clock;

Zaehlung: process(p)

variable pbcd: std_logic_vector(7 downto 0):= (others => '0');
variable s0p: std_logic_vector(3 downto 0):= (others => '0');
variable s1p: std_logic_vector(3 downto 0):= (others => '0');
begin
pbcd := int_bin(p);
s0p:= pbcd(3 downto 0);
s1p:= pbcd(7 downto 4);
s2 <= "1000000";
s3 <= "1000000";

case s0p is

when "0000" => s0 <= "1000000";
when "0001" => s0 <= "1111001";
when "0010" => s0 <= "0100100";
when "0011" => s0 <= "0110000";
when "0100" => s0 <= "0011001";
when "0101" => s0 <= "0010010";
when "0110" => s0 <= "0000010";
when "0111" => s0 <= "1111000";
when "1000" => s0 <= "0000000";
when "1001" => s0 <= "0010000";
when others => s0 <= "0001110";
end case;

case s1p is

when "0000" => s1 <= "1000000";
when "0001" => s1 <= "1111001";
when "0010" => s1 <= "0100100";
when "0011" => s1 <= "0110000";
when "0100" => s1 <= "0011001";
when "0101" => s1 <= "0010010";
when "0110" => s1 <= "0000010";
when "0111" => s1 <= "1111000";
when "1000" => s1 <= "0000000";
when "1001" => s1 <= "0010000";
when others => s1 <= "0001110";
end case;

end process Zaehlung;
end logik;

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