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Solution:
1)
Since 64k = 2^16, 16 bits are used as memory index number.
For direct mapping, 256 bytes / 8 bytes/line = 32 lines
32 = 2^5, 8= 2^3
Thus, 5 bits are used as line index bits, 3 bits are used for byte offset.
Remaining 16-(5+3)=8 bits are used as tag bits.
The format is:
Tag:8 bits Line:5 bits Bytes:3 bits
For associative mapping, without knowing the number of lines contained in a set, the format should be:
Tag:13 bits Bytes:3 bits
For 2-way set associative mapping, 32 lines / 2 lines/set = 16 sets = 2^4 sets
Thus, 4 bits are used as set index bits.
Since 3 bits are used for byte offset, 16-(4+3)=9 bits are used as tag bits.
The format is:
Tag:9 bits Set:4 bits Bytes:3 bits
2)
Index bits (3-7) specify the cache line.
Address 0001 0001 0001 1011 is stored in line 3, and address 1010 1010 1010 1010 is stored in line 21.
3)
The tag and index bits of other addresses should match.
Other addresses include: 0001 1111 0001 1xyz,
where x, y, z could be 0 or 1.
4)
Virtual address space is 32G bytes = 2^5 * 2^30 bytes = 2^35 bytes. It requires 35 bits.
Physical address space is 128M bytes = 2^7 * 2^20 bytes = 2^27 bytes. It requires 27 bits.
Page offset is from 0 to 16*1024-1 = 16383, and it requires log_2(16384) = 14 bits.
Thus, in the logical address space, it requires 35 - 14 = 21 bits to represent the page number.
The format is:
Page #:21 bits Page Offset:14 bits
In main memory, it requires 27 - 14 = 13 bits to represent the frame number.
The format is:
Frame #:13 bits Page Offset:14 bits
1)
Since 64k = 2^16, 16 bits are used as memory index number.
For direct mapping, 256 bytes / 8 bytes/line = 32 lines
32 = 2^5, 8= 2^3
Thus, 5 bits are used as line index bits, 3 bits are used for byte offset.
Remaining 16-(5+3)=8 bits are used as tag bits.
The format is:
Tag:8 bits Line:5 bits Bytes:3 bits
For associative mapping, without knowing the number of lines contained in a set, the format should be:
Tag:13 bits Bytes:3 bits
For 2-way set associative mapping, 32 lines / 2 lines/set = 16 sets = 2^4 sets
Thus, 4 bits are used as set index bits.
Since 3 bits are used for byte offset, 16-(4+3)=9 bits are used as tag bits.
The format is:
Tag:9 bits Set:4 bits Bytes:3 bits
2)
Index bits (3-7) specify the cache line.
Address 0001 0001 0001 1011 is stored in line 3, and address 1010 1010 1010 1010 is stored in line 21.
3)
The tag and index bits of other addresses should match.
Other addresses include: 0001 1111 0001 1xyz,
where x, y, z could be 0 or 1.
4)
Virtual address space is 32G bytes = 2^5 * 2^30 bytes = 2^35 bytes. It requires 35 bits.
Physical address space is 128M bytes = 2^7 * 2^20 bytes = 2^27 bytes. It requires 27 bits.
Page offset is from 0 to 16*1024-1 = 16383, and it requires log_2(16384) = 14 bits.
Thus, in the logical address space, it requires 35 - 14 = 21 bits to represent the page number.
The format is:
Page #:21 bits Page Offset:14 bits
In main memory, it requires 27 - 14 = 13 bits to represent the frame number.
The format is:
Frame #:13 bits Page Offset:14 bits
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