Question

急求verilog 十彩灯控制器程序

Answer 1

always @ (posedge clk or negedge rst_n) begin
if (rst_n == 1'b0)
intv <= 2'b0;
else
intv <= intv[1:0] + 2'b01; // 假设输入时钟的周期是0.25s的做法
end

always @ (posedge clk or negedge rst_n) begin
if (rst_n == 1'b0)
led <= 10'h0; //0为亮，1灭
cnt <= 5'h0;
else
if ( sel_1s & intv[1] or ~sel_1s & intv[0]) // 选间隔
if (cnt < 5'h5)
led <= {led[9:2], 2'b10}; // 奇数灭
else if (cnt < 5'ha)
led <= {led[9:2], 2'b11}; // 偶数灭
else if (cnt == 5'ha)
led <= 10'h0; // 加个全亮的步骤，不然后面没得灯灭了
else if (cnt < 5'h14)
led <= {led[9:1], 1'b1}; // 依次灭
else if (cnt == 5'h14)
led <= 10'h0; // 加个全亮的步骤，不然后面没得灯灭了

if (cnt == 5'h14)
cnt <= 5'h0;
else
cnt <= cnt[4:0] + 5'h1;
end
end