Cadence 导入网络表时出现这 请问怎么修改
CadenceDesignSystems,Inc.netrev16.2ThuDec0121:03:532011(C)Copyright2002CadenceDesignS...
Cadence Design Systems, Inc. netrev 16.2 Thu Dec 01 21:03:53 2011
(C) Copyright 2002 Cadence Design Systems, Inc.
------ Directives ------
RIPUP_ETCH FALSE;
RIPUP_SYMBOLS ALWAYS;
Missing symbol has error FALSE;
SCHEMATIC_DIRECTORY 'F:/肖文浩/candence/1';
BOARD_DIRECTORY '';
OLD_BOARD_NAME 'C:/creaboard/11.brd';
NEW_BOARD_NAME 'C:/creaboard/11.brd';
CmdLine: netrev -$ -i F:/肖文浩/candence/1 -y 1 C:/creaboard/#Taaaaaa03596.tmp
------ Preparing to read pst files ------
Starting to read F:/肖文浩/candence/1/pstchip.dat
Finished reading F:/肖文浩/candence/1/pstchip.dat (00:00:00.10)
Starting to read F:/肖文浩/candence/1/pstxprt.dat
Finished reading F:/肖文浩/candence/1/pstxprt.dat (00:00:00.00)
Starting to read F:/肖文浩/candence/1/pstxnet.dat
Finished reading F:/肖文浩/candence/1/pstxnet.dat (00:00:00.00)
------ Oversights/Warnings/Errors ------
#1 ERROR(SPMHNI-191): Device/Symbol check error detected.
ERROR(SPMHNI-195): Symbol 'DPDT-6' for device 'SW_0_DPDT-6_SW' is missing pin '5'.
ERROR(SPMHNI-195): Symbol 'DPDT-6' for device 'SW_0_DPDT-6_SW' is missing pin '6'.
#1 WARNING(SPMHNI-192): Device/Symbol check warning detected.
ERROR(SPMHNI-196): Symbol 'TO-223' for device '1117_TO-223_1117' has extra pin '4'.
------ Library Paths ------
MODULEPATH = .
C:/Cadence/SPB_16.2/share/local/pcb/modules
PSMPATH = .
symbols
..
../symbols
C:/Cadence/SPB_16.2/share/local/pcb/symbols
C:/Cadence/SPB_16.2/share/pcb/pcb_lib/symbols
C:/Cadence/SPB_16.2/share/pcb/allegrolib/symbols
C:\MYPCBLIB\
PADPATH = .
symbols
..
../symbols
C:/Cadence/SPB_16.2/share/local/pcb/padstacks
C:/Cadence/SPB_16.2/share/pcb/pcb_lib/symbols
C:/Cadence/SPB_16.2/share/pcb/allegrolib/symbols
C:\mypcblib\
------ Summary Statistics ------
#2 Run stopped because errors were detected
netrev run on Dec 1 21:03:53 2011
DESIGN NAME : 'STCCCCCC'
PACKAGING ON Sep 28 2008 21:55:15
COMPILE 'logic'
CHECK_PIN_NAMES OFF
CROSS_REFERENCE OFF
FEEDBACK OFF
INCREMENTAL OFF
INTERFACE_TYPE PHYSICAL
MAX_ERRORS 500
MERGE_MINIMUM 5
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
NET_NAME_LENGTH 24
OVERSIGHTS ON
REPLACE_CHECK OFF
SINGLE_NODE_NETS ON
SPLIT_MINIMUM 0
SUPPRESS 20
WARNINGS ON
2 errors detected
No oversight detected
1 warnings detected
cpu time 0:01:44
elapsed time 0:00:01 展开
(C) Copyright 2002 Cadence Design Systems, Inc.
------ Directives ------
RIPUP_ETCH FALSE;
RIPUP_SYMBOLS ALWAYS;
Missing symbol has error FALSE;
SCHEMATIC_DIRECTORY 'F:/肖文浩/candence/1';
BOARD_DIRECTORY '';
OLD_BOARD_NAME 'C:/creaboard/11.brd';
NEW_BOARD_NAME 'C:/creaboard/11.brd';
CmdLine: netrev -$ -i F:/肖文浩/candence/1 -y 1 C:/creaboard/#Taaaaaa03596.tmp
------ Preparing to read pst files ------
Starting to read F:/肖文浩/candence/1/pstchip.dat
Finished reading F:/肖文浩/candence/1/pstchip.dat (00:00:00.10)
Starting to read F:/肖文浩/candence/1/pstxprt.dat
Finished reading F:/肖文浩/candence/1/pstxprt.dat (00:00:00.00)
Starting to read F:/肖文浩/candence/1/pstxnet.dat
Finished reading F:/肖文浩/candence/1/pstxnet.dat (00:00:00.00)
------ Oversights/Warnings/Errors ------
#1 ERROR(SPMHNI-191): Device/Symbol check error detected.
ERROR(SPMHNI-195): Symbol 'DPDT-6' for device 'SW_0_DPDT-6_SW' is missing pin '5'.
ERROR(SPMHNI-195): Symbol 'DPDT-6' for device 'SW_0_DPDT-6_SW' is missing pin '6'.
#1 WARNING(SPMHNI-192): Device/Symbol check warning detected.
ERROR(SPMHNI-196): Symbol 'TO-223' for device '1117_TO-223_1117' has extra pin '4'.
------ Library Paths ------
MODULEPATH = .
C:/Cadence/SPB_16.2/share/local/pcb/modules
PSMPATH = .
symbols
..
../symbols
C:/Cadence/SPB_16.2/share/local/pcb/symbols
C:/Cadence/SPB_16.2/share/pcb/pcb_lib/symbols
C:/Cadence/SPB_16.2/share/pcb/allegrolib/symbols
C:\MYPCBLIB\
PADPATH = .
symbols
..
../symbols
C:/Cadence/SPB_16.2/share/local/pcb/padstacks
C:/Cadence/SPB_16.2/share/pcb/pcb_lib/symbols
C:/Cadence/SPB_16.2/share/pcb/allegrolib/symbols
C:\mypcblib\
------ Summary Statistics ------
#2 Run stopped because errors were detected
netrev run on Dec 1 21:03:53 2011
DESIGN NAME : 'STCCCCCC'
PACKAGING ON Sep 28 2008 21:55:15
COMPILE 'logic'
CHECK_PIN_NAMES OFF
CROSS_REFERENCE OFF
FEEDBACK OFF
INCREMENTAL OFF
INTERFACE_TYPE PHYSICAL
MAX_ERRORS 500
MERGE_MINIMUM 5
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
NET_NAME_LENGTH 24
OVERSIGHTS ON
REPLACE_CHECK OFF
SINGLE_NODE_NETS ON
SPLIT_MINIMUM 0
SUPPRESS 20
WARNINGS ON
2 errors detected
No oversight detected
1 warnings detected
cpu time 0:01:44
elapsed time 0:00:01 展开
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