Question

怎样用ise调用fft的ip核

fft的IP核是在ISE中就有直接调用就可以吗？14.1中怎样找fft的IP核心？

Answer 1

在Design窗口右键选New Source 选中左边列表里的IP(Core Generator ...) 随便写个名字 点next就可以看到IP库的索引 FFT IP CORE在Digital Signal Processing - Transforms - FFTs下

14.x的名字应该是Fast Fourier Transform 7.1
在配置界面点help可以打开pdf格式的详细说明

追问

感谢！已经找到
能问一下怎么样用ip核在modelsim里面仿真吗？

追答

生成ip核的同时会产生仿真模型 和普通仿真没有区别 看看pdf的第17页simulation models部分
注意：modelsim仿真需要先编译xilinx的库 （不熟悉的话在百度上搜 ise modelsim仿真库）

When the core is generated using the CORE Generator software, a UniSim-based simulation model is created. The
FFT core does not have a VHDL or Verilog functional behavioral model. For this reason, the core overrides the
CORE Generator Project Options and always delivers a Structural model type.
Xilinx recommends that the designer run simulations using a resolution of 1 ps. Some Xilinx library components
require a 1 ps resolution to work properly in either functional or timing simulation. The FFT core UniSIm-based
structural model may produce incorrect results if simulated with a resolution other than 1 ps. See the “Register
Transfer Level (RTL) Simulation Using Xilinx Libraries” section in Chapter 6 of the Synthesis and Simulation Design
Guide for more information.