Question

求解vhdl问题，先行谢过各位大神

警告提示Warning (10631): VHDL Process Statement warning at CONTROLER.vhd(25): inferring latch(es) for signal or variable "FHZ_BUFF", which holds its previous value in one or more paths through the process
请问要怎么才能消除警告
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CONTROLER IS
PORT(F1HZ:IN STD_LOGIC;
F10HZ:IN STD_LOGIC;
F100HZ:IN STD_LOGIC;
OVER_IN :IN STD_LOGIC_VECTOR(2 DOWNTO 0);

F_HZ : OUT STD_LOGIC;
LIGHT : OUT STD_LOGIC;
DP:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END CONTROLER;
ARCHITECTURE ONE OF CONTROLER IS
signal DOT: std_logic_VECTOR(7 downto 0);
SIGNAL TME_BUFF:STD_LOGIC_VECTOR(2 DOWNTO 0);
SIGNAL FHZ_BUFF:STD_LOGIC;
SIGNAL LIGHT_BUFF:STD_LOGIC;
全部程序发不上来，TOT

Answer 1

看不到程序，讲个P，报错显示产生多余的锁存器 检查 如if 之后要加else 不加会产生额外的锁存的

追问

我把程序用私信发过来吧，这上面程序发不上来

追答

追问

我试过了，功能在开发板上都是能够实现的……问题在于我不知道怎么解除警告了