MSP430新人求程序方便学习 关于MSP430F149的程序(用键盘调节方波占空比)
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//*******************************************************************************
// MSP-FET430P140 Demo - Timer_A, PWM TA1-2, Up Mode, HF XTAL ACLK
//
// Description: This program generates two PWM outputs on P1.2,3 using
// Timer_A configured for up mode. The value in CCR0, 512-1, defines the PWM
// period and the values in CCR1 and CCR2 the PWM duty cycles. Using HF XTAL
// ACLK as TACLK, the timer period is HF XTAL/512 with a 75% duty cycle
// on P1.2 and 25% on P1.3.
// ACLK = MCLK = TACLK = HF XTAL
// //* HF XTAL REQUIRED AND NOT INSTALLED ON FET *//
// //* Min Vcc required varies with MCLK frequency - refer to datasheet *//
//
// MSP430F149
// -----------------
// /|\| XIN|-
// | | | HF XTAL (455k - 8MHz)
// --|RST XOUT|-
// | |
// | P1.2/TA1|--> CCR1 - 75% PWM
// | P1.3/TA2|--> CCR2 - 25% PWM
//
// M. Buccini
// Texas Instruments Inc.
// Feb 2005
// Built with IAR Embedded Workbench Version: 3.21A
//******************************************************************************
#include <msp430x14x.h>
void main(void)
{
volatile unsigned int i;
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
BCSCTL1 |= XTS; // ACLK= LFXT1 = HF XTAL
do
{
IFG1 &= ~OFIFG; // Clear OSCFault flag
for (i = 0xFF; i > 0; i--); // Time for flag to set
}
while ((IFG1 & OFIFG)); // OSCFault flag still set?
BCSCTL2 |= SELM_3; // MCLK= LFXT1 (safe)
P1DIR |= 0x0C; // P1.2 and P1.3 output
P1SEL |= 0x0C; // P1.2 and P1.3 TA1/2 otions
CCR0 = 512-1; // PWM Period pw波的总时间
CCTL1 = OUTMOD_7; // CCR1 reset/set
CCR1 = 384; // CCR1 PWM duty cycle 384/511为占空比
CCTL2 = OUTMOD_7; // CCR2 reset/set
CCR2 = 128; // CCR2 PWM duty cycle
TACTL = TASSEL_1 + MC_1; // ACLK, up mode
_BIS_SR(LPM0_bits); // Enter LPM0
}
// MSP-FET430P140 Demo - Timer_A, PWM TA1-2, Up Mode, HF XTAL ACLK
//
// Description: This program generates two PWM outputs on P1.2,3 using
// Timer_A configured for up mode. The value in CCR0, 512-1, defines the PWM
// period and the values in CCR1 and CCR2 the PWM duty cycles. Using HF XTAL
// ACLK as TACLK, the timer period is HF XTAL/512 with a 75% duty cycle
// on P1.2 and 25% on P1.3.
// ACLK = MCLK = TACLK = HF XTAL
// //* HF XTAL REQUIRED AND NOT INSTALLED ON FET *//
// //* Min Vcc required varies with MCLK frequency - refer to datasheet *//
//
// MSP430F149
// -----------------
// /|\| XIN|-
// | | | HF XTAL (455k - 8MHz)
// --|RST XOUT|-
// | |
// | P1.2/TA1|--> CCR1 - 75% PWM
// | P1.3/TA2|--> CCR2 - 25% PWM
//
// M. Buccini
// Texas Instruments Inc.
// Feb 2005
// Built with IAR Embedded Workbench Version: 3.21A
//******************************************************************************
#include <msp430x14x.h>
void main(void)
{
volatile unsigned int i;
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
BCSCTL1 |= XTS; // ACLK= LFXT1 = HF XTAL
do
{
IFG1 &= ~OFIFG; // Clear OSCFault flag
for (i = 0xFF; i > 0; i--); // Time for flag to set
}
while ((IFG1 & OFIFG)); // OSCFault flag still set?
BCSCTL2 |= SELM_3; // MCLK= LFXT1 (safe)
P1DIR |= 0x0C; // P1.2 and P1.3 output
P1SEL |= 0x0C; // P1.2 and P1.3 TA1/2 otions
CCR0 = 512-1; // PWM Period pw波的总时间
CCTL1 = OUTMOD_7; // CCR1 reset/set
CCR1 = 384; // CCR1 PWM duty cycle 384/511为占空比
CCTL2 = OUTMOD_7; // CCR2 reset/set
CCR2 = 128; // CCR2 PWM duty cycle
TACTL = TASSEL_1 + MC_1; // ACLK, up mode
_BIS_SR(LPM0_bits); // Enter LPM0
}
更多追问追答
追问
这是输出的占空比为25%和75%的方波吧 我要的是可调的
追答
自己再写个键盘,然后修改CCR1的值 或者CCR0 不就好了
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