Question

求高手帮忙翻译一下！！急

Design and analysis of low power memory using efficient
charge recovery logic circuits
ECRL (efficient charge recovery logic) circuits can reduce the energy consumption compared with that of the static circuits. The
ECRL circuits have been applied to the combination logic. However, storage elements are also required for most of digital circuits.A simple structure of an ECRL latch is proposed for a storage element. It consists of an ECRL inverter, an ECRL NAND gate, and
two MOSFET switches, and it has input signals of ‘enable’, ‘input’, and ‘reset’. A 16 · 8-bit shift register file is designed using the latches and a specially designed power supply which generates 4-phase oscillatory waves. The efficiency of the energy consumption is improved by about 50% as the changing rates of the input values are decreased, and it is not affected by the power supply clock frequency in the range of 100–400 MHz. The energy consumption of the proposed circuit is about half of that of the static CMOS TSPCL (true single-phase clocked logic) register
不要用那种翻译软件翻译的。。。。

Answer 1

设计与分析的低功耗内存使用效率

负责回收逻辑电路

ECRL （高效负责回收逻辑电路）电路可以减少能源消耗，与静态电路。那个

ECRL电路已应用于的组合逻辑。然而，存储的内容也需要对大多数的数字circuits.A结构简单的ECRL门闩提议为一个存储单元。它由一个ECRL逆变器，一个ECRL与非门，并

两个MOSFET开关，它的输入信号的'使' ， '输入'和'重' 。 16 8位移位寄存器文件的目的是利用锁存器和一个专门设计的电源供应器产生4波振荡阶段。效率的能源消耗，提高了约50 ％的变化率为输入值的下降，这是不会受到影响电力供应的时钟频率范围为100-400兆赫。能源消耗所提议的电路的一半左右，在静态CMOS TSPCL （真正的单相频率逻辑）登记