用VHDL语言实现8位流水灯控制器
1、系统晶振为50MHz,流水灯输入时钟为1Hz,即每秒钟变化一次;2、流水灯输出为8位显示,每次仅一个灯亮;3、用至少两种方法来设计流水灯的各部分功能模块(如:可以用元...
1、系统晶振为50MHz,流水灯输入时钟为1Hz,即每秒钟变化一次;
2、流水灯输出为8位显示,每次仅一个灯亮;
3、用至少两种方法来设计流水灯的各部分功能模块(如:可以用元件例化的方法,或者用多进程的设计方法等等)。 展开
2、流水灯输出为8位显示,每次仅一个灯亮;
3、用至少两种方法来设计流水灯的各部分功能模块(如:可以用元件例化的方法,或者用多进程的设计方法等等)。 展开
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Use Shift Registers, you can have a switch to choose shift left or shift right.
I will give you some ideas, MODIFY it yourself:
Change the code to make "start" and "stop" logic work.
--------------------------
library ieee ;
use ieee.std_logic_1164.all;
entity mylight is
port (start : in std_logic;
stop : in std_logic;
shift_left : in std_logic;
Q : out std_logic_vector(7 downto 0)
);
end mylights;
architechture behavior of mylights is
signal lights : std_logic_vector(7 downto 0);
process (clk, start, stop, shift_left)
begin
if (start = '0' or stop = '1') then
lights <= (others => '1');
elsif (clk'event and clk = '1') then
if (shift_left = '1') then
lights <= lights(6 downto 0) & '0';
else
lights <= '0' & lights(7 downto 1);
end;
end;
end process;
Q <= lights;
end behavior;
I will give you some ideas, MODIFY it yourself:
Change the code to make "start" and "stop" logic work.
--------------------------
library ieee ;
use ieee.std_logic_1164.all;
entity mylight is
port (start : in std_logic;
stop : in std_logic;
shift_left : in std_logic;
Q : out std_logic_vector(7 downto 0)
);
end mylights;
architechture behavior of mylights is
signal lights : std_logic_vector(7 downto 0);
process (clk, start, stop, shift_left)
begin
if (start = '0' or stop = '1') then
lights <= (others => '1');
elsif (clk'event and clk = '1') then
if (shift_left = '1') then
lights <= lights(6 downto 0) & '0';
else
lights <= '0' & lights(7 downto 1);
end;
end;
end process;
Q <= lights;
end behavior;
参考资料: http://zhidao.baidu.com/question/2386563.html?fr=ala0
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肯定是cuit的
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2010-11-02
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dfasvr2EGH
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