使用Allegro PCB在导入逻辑时,提示找不到封装 10
我在使用AllegroPCB在导入逻辑时,提示找不到封装。原理图中的DRC检查和规则检查都是通过的。RIPUP_ETCHFALSE;RIPUP_DELETE_FIRST_...
我在使用Allegro PCB在导入逻辑时,提示找不到封装。原理图中的DRC检查和规则检查都是通过的。
RIPUP_ETCH FALSE;
RIPUP_DELETE_FIRST_SEGMENT FALSE;
RIPUP_RETAIN_BONDWIRE FALSE;
RIPUP_SYMBOLS ALWAYS;
Missing symbol has error FALSE;
SCHEMATIC_DIRECTORY '.';
BOARD_DIRECTORY '';
OLD_BOARD_NAME 'F:/TRC200/TRC200-BK_B/PCB/TRC200-BK-B.brd';
NEW_BOARD_NAME 'F:/TRC200/TRC200-BK_B/PCB/TRC200-BK-B.brd';
CmdLine: netrev -$ -i . -y 1 F:/TRC200/TRC200-BK_B/PCB/#Taaaaaa04148.tmp
------ Preparing to read pst files ------
#1 ERROR(24) File not found
Packager files not found
#2 ERROR(102) Run stopped because errors were detected
netrev run on Jun 4 15:50:05 2014
COMPILE 'logic'
CHECK_PIN_NAMES OFF
CROSS_REFERENCE OFF
FEEDBACK OFF
INCREMENTAL OFF
INTERFACE_TYPE PHYSICAL
MAX_ERRORS 500
MERGE_MINIMUM 5
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
NET_NAME_LENGTH 24
OVERSIGHTS ON
REPLACE_CHECK OFF
SINGLE_NODE_NETS ON
SPLIT_MINIMUM 0
SUPPRESS 20
WARNINGS ON
2 errors detected
No oversight detected
No warning detected 展开
RIPUP_ETCH FALSE;
RIPUP_DELETE_FIRST_SEGMENT FALSE;
RIPUP_RETAIN_BONDWIRE FALSE;
RIPUP_SYMBOLS ALWAYS;
Missing symbol has error FALSE;
SCHEMATIC_DIRECTORY '.';
BOARD_DIRECTORY '';
OLD_BOARD_NAME 'F:/TRC200/TRC200-BK_B/PCB/TRC200-BK-B.brd';
NEW_BOARD_NAME 'F:/TRC200/TRC200-BK_B/PCB/TRC200-BK-B.brd';
CmdLine: netrev -$ -i . -y 1 F:/TRC200/TRC200-BK_B/PCB/#Taaaaaa04148.tmp
------ Preparing to read pst files ------
#1 ERROR(24) File not found
Packager files not found
#2 ERROR(102) Run stopped because errors were detected
netrev run on Jun 4 15:50:05 2014
COMPILE 'logic'
CHECK_PIN_NAMES OFF
CROSS_REFERENCE OFF
FEEDBACK OFF
INCREMENTAL OFF
INTERFACE_TYPE PHYSICAL
MAX_ERRORS 500
MERGE_MINIMUM 5
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
NET_NAME_LENGTH 24
OVERSIGHTS ON
REPLACE_CHECK OFF
SINGLE_NODE_NETS ON
SPLIT_MINIMUM 0
SUPPRESS 20
WARNINGS ON
2 errors detected
No oversight detected
No warning detected 展开
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