Question

求翻译，急啊~~

SYSTEM TESTING
With the support of system-level scan pathmanagement devices from a variety of silicon vendors, the boundary-scan test capability implemented for board-level manufacturing test can be extended to the system level. Designing in this boundary-scan “backbone” in the
system provides many capabilities in addition to those realized at board-level test as detailed below. Reuse of board-level test vectors leading to reduced test development times.
Verification of board-to-board interconnections supporting diagnosis of backplane interconnection failures at the connector pin level. Eliminate redundant functional tests with
ambiguous diagnostics. Facilitate system checkout prior to shipment. Provides access for firmware verification and upgrade without disassembly. Supports pin-level diagnostics during
environmental stress testing. Provides infrastructure to exercise embedded test structures embedded in ASICs and FPGAs. Data collection, or data mining, throughout the system via single point of access. In order to realize these benefits, it is imperative to plan the system-level test strategy in the system’s conceptual phase. This will require early collaboration by designers and system architects to define the system-level boundary-scan architecture.

Answer 1

系统测试
的支持下，系统级扫描pathmanagement设备从不同的芯片厂商，在边界扫描测试能力，执行局一级的生产测试，可以延长到系统级别。在这个设计边界扫描“骨干”的
系统提供了许多功能，除了这些实现板级测试，详情如下。  重用板级测试向量从而降低测试开发时间。
 核查板对板互连支持诊断背板互连故障的连接器引脚水平。  消除冗余功能测试
模棱两可的诊断。  促进系统结帐装运之前。  提供的固件升级没有核查和拆卸。  支持引脚级别诊断中
环境压力测试。  提供基础设施行使嵌入式测试结构内置于ASIC和FPGA 。  收集数据，或数据挖掘，整个系统通过单一访问点。为了实现这些好处，必须计划的系统级测试的战略系统的概念阶段。这将需要早期合作的设计师和系统架构师定义系统级边界扫描结构。