Question

EDA程序错误，急需帮忙（VHDL语言）

Error (10500): VHDL syntax error at LOCK.vhd(9) near text "END"; expecting an identifier ("end" is a reserved keyword), or "constant", or "file", or "signal", or "variable"
Error (10500): VHDL syntax error at LOCK.vhd(11) near text ")"; expecting ":", or ","
Error (10500): VHDL syntax error at LOCK.vhd(26) near text "BEGIN"; expecting an identifier ("begin" is a reserved keyword), or "constant", or "file", or "signal", or "variable"
Error (10500): VHDL syntax error at LOCK.vhd(41) near text "BEGIN"; expecting an identifier ("begin" is a reserved keyword), or "constant", or "file", or "signal", or "variable"
LIBRARY IEEE ;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY LOCK IS
PORT(CLK,CLR: IN STD_LOGIC;
DIN: IN STD_LOGIC_VECTOR(3 DOWNTO 0);
AB : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
ALARM : OUT STD_LOGIC;
viewstate: OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
END LOCK;
ARCHITECTURE behav OF LOCK IS
TYPE states IS (st0, st1, st2, st3,st4,st5,st6,st7,st8,st9);
SIGNAL current_state,next_state:states ;
SIGNAL D0 : STD_LOGIC_VECTOR(3 DOWNTO 0);
...
SIGNAL T0 : STD_LOGIC_VECTOR(3 DOWNTO 0);
...
SIGNAL T5 : STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL Q : INTEGER RANGE 0 TO 2;
BEGIN
D0 <="0000" ;
D1 <="0001" ;
D2 <="0010" ;
D3 <="0011" ;
D4 <="0100" ;
D5 <="0101" ;
PROCESS( CLK, CLR )
BEGIN
IF CLR = '1' THEN current_state<=st8 ;
ELSIF CLK'EVENT AND CLK='1' THEN current_state<=next_state;
END IF ;
END PROCESS ;
PROCESS( current_state )
variable a:integer range 0 to 2;
BEGIN
CASE current_state IS
WHEN st9=> Q<= 2 ; next_state <= st0 ;viewstate<="1001";
WHEN st8=> Q<= 0 ; next_state <= st0 ;viewstate<="1000"; a<=0;
WHEN st7=> Q<= 1 ; next_state <= st0 ;viewstate<="0111";
WHEN st0=> viewstate<="0000"; T0<=DIN; next_state <= st1 ;
WHEN st1=> viewstate<="0001"; T1<=DIN; next_state <= st2 ;
WHEN st2=> viewstate<="0010"; T2<=DIN; next_state <= st3 ;
WHEN st3=> viewstate<="0011"; T3<=DIN; next_state <= st4 ;
WHEN st4=> viewstate<="0100"; T4<=DIN; next_state <= st5 ;
WHEN st5=> viewstate<="0101"; T5<=DIN; next_state <= st6 ;
WHEN st6=> viewstate<="0110"; IF T0 = D0 and
T1 = D1 and
T2 = D2 and
T3 = D3 and
T4 = D4 and
T5 = D5
THEN next_state <= st7 ;
ELSE
IF a=2 THEN next_state <= st9;
ELSE a<=a+1;next_state <= st0 ;
END IF ;
END IF ;
WHEN OTHERS => next_state <= st0;
END CASE ;
END PROCESS ;
PROCESS( Q )
BEGIN
CASE Q IS
WHEN 1 =>AB<= "1010" ;
WHEN 0 =>AB <= "1011" ;
WHEN 2 =>AB <= "1110" ; ALARM <='1' ;
WHEN OTHERS => AB<="0000";
END CASE;
END PROCESS ;
END behav ;
不用回答了，谢谢，我才发现少了半个括号。。

若以下回答无法解决问题，邀请你更新回答

Answer 1

看错误提示就看出来了啊

追问

就是看了不知道哪里错，不过后来我找到了，是上一行少了括号，还是谢谢你了，送你满意回答吧~

追答

你才学不久吧，想这种错误最好找了，难找的错误是它说什么连接错误，都不知道哪有问题。。。